This invention relates to an improvement in a multiplier circuit that is often used as a frequency converter or synchronous detector.
A multiplier circuit that is often used as a frequency converter or synchronous detector is shown in FIG. 1. This multiplier is identical to that shown in FIGS. 1 and 5 of U.S. Pat. No. 3,550,040, and is commonly referred to as a double-balanced multiplier. The signal from signal source S1 is supplied phase-inverted to a differential amplifier which comprises transistors Q1, Q2, resistors R1, R2 and a constant current source IO1. The carrier signal from the carrier signal source S2 is supplied phase-inverted to the nodes of the bases of the transistors Q3, Q6 and of the bases of transistors Q4, Q5. The product output by this circuit is output from output terminal O1, which is connected to the node of resistor R3 and the collectors of transistors Q3, Q5 or from the output terminal O2, which is connected to the node of resistor R4 and the collectors of transistors Q4, Q6.
With a multiplier circuit having the structure described above, output signals corresponding to the signals from signal source S1 are output from the collectors of transistors Q1, Q2. Transistors Q3-Q6 selectively turn ON and OFF in response to the voltage level of the carrier signal from carrier signal source S2 so differential signals of mutually opposite phases are selectively supplied to output terminals O1, O2. For example, when transistors Q3, Q6 are ON, the collector output of transistor Q1 is supplied to output terminal O1 via transistor Q3, and when transistors Q4, Q5 are ON, the collector output of transistor Q2 is supplied to output terminal O1 via transistor Q5. In this way, it is possible to obtain the product output of the signals from the signals sources S1, S2 at the output terminals O1, O2.
With this kind of multiplier circuit, load resistor R3, transistor Q3 or Q5, transistor Q1 or Q2, resistor R1 or R2, and constant current source IO1 are connected in series between source voltage Vcc and ground. When the source voltage is low, the dynamic range of the output signal becomes insufficient and, consequently, the operating capacity of the multiplier is decreased. For example, if the source voltage is set at 5 V, the bias voltage of the constant current source IO1 at 2.5 V and the bias voltage of the carrier signal at 3.5 V, it will be impossible to obtain a product signal with a dynamic range over 1 V. This is not sufficient for practical purposes. The product output of this circuit, therefore, must be amplified, which results in more susceptibility to noise.